1. Field of the Invention
The present invention relates to a semiconductor device including a multi-gate metal-insulator-semiconductor (MIS) transistor having a channel on a plurality of surfaces, and a method of fabricating the same.
2. Description of the Related Art
Recently, a multi-gate MISFET having a strong short channel effect immunity is attracting attention. Examples of the multi-gate MISFET are a double-gate MISFET having gates on both the right and left surfaces of a projecting portion (fin) serving as an active region, a tri-gate MISFET having gates on three surfaces, i.e., the upper surface and the right and left surfaces, and a gate-all-around (GAA) MISFET in which a gate covers the whole fin. Each structure increases the dominating power of the gate compared to the conventional planar MISFET, thereby suppressing the short channel effect. A method using Ge as a channel in order to increase the channel mobility is also proposed. A combination of Ge as a high-mobility material and any of these multi-gate MISFETs is presumably well applicable to a low-power-consumption, high-performance element.
The multi-gate MISFET as described above normally has a rectangular fin section, and therefore has the problem that electric field concentration readily occurs at corners, and this readily causes gate insulating film breakdown. Accordingly, a multi-gate MISFET having a polygonal channel with five or more corners in order to give each fin corner an obtuse angle and to alleviate the field concentration is proposed (JP-A 2005-203798 (KOKAI)).
The method of JP-A 2005-203798, however, forms a channel portion by selective epitaxial growth from an initial substrate, and uses a facet surface which appears upon the selective epitaxial growth, so the channel section has no vertical symmetry. Accordingly, the polygonal channel formed by this method is unsuitable for a GAA-MISFET having the highest short channel effect immunity. This is so because an electric field does not vertically symmetrically act, and this makes the device unstable. Also, applying a strain to a multi-gate MISFET fabricated by this method in order to increase the current drive requires so-called hetero-epitaxial growth which grows crystals of a channel material different from the material of an initial substrate. Unfortunately, a dissimilar-material hetero-interface like this acts as a defect formation source and hence has an adverse effect on the reliability and leak characteristics of the device.
On the other hand, a multi-gate Ge-MISFET using Ge as a channel material can be generally fabricated by using a bulk Ge substrate or Ge-on-insulator (GOI) substrate as an initial substrate. However, Ge greatly differs from Si in process conditions, and no process of forming a narrow fin by using Ge has been established yet. Also, forming a GOI layer on an entire substrate having a large diameter makes the defect density very difficult to reduce. A GOI substrate thus having many defects greatly increases the leakage current.